The present invention relates generally to memory systems and in particular, to flash memory array systems and methods for determining the threshold voltage of a core cell, wherein a newly applied reference cell structure, a new external signal bias structure, and the application of an external characterization signal during program read verify operations, enables a measurement of the actual core cell threshold voltage.
Flash memory is a type of electronic memory media which can be rewritten and hold its data without power applied thereto.
In flash cells, programming is carried out by applying appropriate voltages to the source, drain, and control gate of the device for an appropriate time period. This causes electrons to tunnel or be injected from a channel region to a stacked gate. The amount of charge residing on the stacked gate determines the voltage required on the control gate to cause the device to conduct current between the source and drain regions. This voltage is termed the threshold voltage, VT, of the cell. Conduction represents an xe2x80x9conxe2x80x9d or erased state of the device and corresponds to a logic value of one. An xe2x80x9coffxe2x80x9d or programmed state is one in which current is not conducted between the source and drain regions and corresponds to a logic value of zero. By setting the threshold voltage of the cell to an appropriate value, the cell can be made to either conduct or not conduct current for a given set of applied voltages. Thus, by determining whether a cell conducts current at the given set of applied voltages, the state of the cell (programmed or erased) can be determined.
In a prior art flash memory device, such as the stacked gate array, a cell is programmed by applying the programming voltages for some period of time in the form of a programming pulse, and over programming the memory cells was not a significant problem. Even though write program pulses were relatively long, this did not change the cell threshold voltage substantially for a given pulse width. With the newer dual bit memory cells, however, even a narrow 1 microsecond program pulse can easily over program the cells to an undesirably high VT level.
When reading the state of the memory cell, the threshold voltage value or range of values for which the memory cell conducts current (as determined by comparison with a sense amplifier having a preselected reference value) corresponds to a binary decoded value representing the programmed data. The threshold voltage level for which the cell conducts thus corresponds to a bit set representing the data programmed into the cell.
In the prior art, threshold voltage determinations after erasure or programming were limited to the determination that the actual threshold voltage was either somewhere above or below an erase verify reference voltage, or a program verify reference voltage respectively. The measurement of this true threshold voltage was not readily obtained.
In order to measure these higher over programmed cell threshold voltages or verify the program condition of the cells, a second problem surfaced in the hardware, wherein an even higher voltage was required on the gate of the transistors which feed the wordline voltage to the array. This wordline driver voltage has to be greater than the core cell VT voltage plus the over drive to verify at a sufficient current range. Given the relatively low wordline drive voltages of the prior art, and some of the high VT""s over programmed dual bit cells, the VT""s of some of the over-programmed cells could not be determined. With the substantial voltage drop in the n-channel pass gate wordline drive voltage, there is yet another problem in distinguishing between the over programmed high cell VT, and the high voltage drops within the chain of selection transistors leading to the wordline of the core cell. This blurred distinction between high VT and high voltage drops, creates additional uncertainties in the VT determinations. Thus, there is also a need for a higher voltage wordline drive voltage, and/or some other means to reduce the voltage drops thru the wordline drive transistors.
It is necessary to be able to program multiple bits (and as a result, multiple memory cells) at the same time in order to produce a commercially desirable memory system which can be programmed within a reasonable amount of time. However, a problem arises when a number of bits are to be programmed at the same time. This is because the characteristics of each bit are different (due to minor variations in the structure and operation of the semiconductor devices which comprise the memory cells), so that variations in the programming speed of different cells will typically occur. This results in bits that become programmed faster than others, (the cell will be programmed to a different threshold voltage level.
As noted, fast programming of multiple memory cells can result in undershooting or overshooting the desired threshold voltage level of some cells, potentially producing an error in subsequently reading the data being stored. In mass storage systems where programming speed is a key performance criteria and lengthy re-programming and erase operations are not desirable, a method for precisely measuring, and/or handling cell threshold voltage characteristics while still in the manufacturing facility before further programming or erase operations by the end user, would be more efficient. What is desired is a method of characterizing the threshold voltages in a multistate memory cell in order to properly and efficiently program the cell, as well as to provide a means of feedback control and correction of the over programmed cells yielding a tighter VT distribution.
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is intended neither to identify key or critical elements of the invention nor to delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention relates to flash memory systems and methods to determine the threshold voltage of core cells. In one exemplary system, there is provided a method of characterizing the high end of the threshold voltage distribution of an array of programmed cells. During verify operations of this exemplary method, an external characterization signal (e.g., a varying core cell characterization signal, staircase, or ramp waveform) is operationally applied to the Wordline, and incrementally changed until a selected, programmed memory cell drain current conduction matches that of a reference cell, and a read sense amplifier comparator changes state in response thereto.
In accordance with another aspect of the invention, there is provided a method of determining the core cell threshold voltage for one or more cells of the array, thereby providing: a VT distribution characterization map of the array for development purposes. In addition, such a characterization map may be employed to generate faster programming times, provide feedback control and correction of the over programmed cells to be in a tighter distribution range of around 4-5 volts, and/or reduce the number of over programmed cells.
One aspect of the invention uses a high breakdown voltage transistor along with some boost driver transistors to conduct a characterization reference signal to the wordline of the core cells. In addition, the application of a charge pump voltage drives the gates of the high breakdown voltage transistor and driver transistors into saturation, and permits full substantial conduction therethrough of the characterization signal to the wordline. Therefore the present invention prevents any appreciable voltage drops associated with such wordline drive circuitry, which heretofore caused excessive uncertainty in the core cell VT determinations. As a characterization signal is applied to the gate of the core cell, and varies with a voltage which is known, a comparison of the corresponding core cell conduction to a known reference cell conduction provides a relatively accurate determination as to the threshold voltage of the over programmed cells.
As discussed, a high charge pump voltage applied to the gates of the high breakdown voltage transistor and wordline drive circuitry has particular significance when measuring the over programmed core cells, where the VT""s are the highest. This is due to the fact that the gate voltage of the high breakdown voltage transistor and wordline drive transistors should be about 3 to 4 volts higher than the applied characterization signal (e.g., up to about 10 volts) to ensure full conduction at all applied signal voltages.
Even though according to one exemplary aspect of the present invention the focus of the inventors is to address the over programmed core cells, it will become immediately obvious to those familiar with the art that this method may also be applied to the determination of all levels of the threshold voltage of core cells by starting the characterization signal at a lower voltage.
Still another exemplary aspect of the invention may use the result of the individual core cell threshold voltage determination, or the complete array threshold voltage characterization within a new control circuit to provide feedback control of the program, read, erase, soft program, operations or related verify operations.
To the accomplishment of the foregoing and related ends, the invention comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative embodiments of the invention. These embodiments are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.